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AM3352BZCZD80 参数 Datasheet PDF下载

AM3352BZCZD80图片预览
型号: AM3352BZCZD80
PDF下载: 下载PDF文件 查看货源
内容描述: 的Sitara AM335x ARM Cortex-A8的微处理器(MPU ) [Sitara AM335x ARM Cortex-A8 Microprocessors (MPUs)]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 236 页 / 2887 K
品牌: TI [ TEXAS INSTRUMENTS ]
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AM3359, AM3358, AM3357  
AM3356, AM3354, AM3352  
SPRS717F OCTOBER 2011REVISED APRIL 2013  
www.ti.com  
5.6.2.1.2.4 Placement  
Figure 5-34 shows the required placement for the LPDDR devices. The dimensions for this figure are  
defined in Table 5-35. The placement does not restrict the side of the PCB on which the devices are  
mounted. The ultimate purpose of the placement is to limit the maximum trace lengths and allow for  
proper routing space. For single-memory LPDDR systems, the second LPDDR device is omitted from the  
placement.  
X
A1  
Y
OFFSET  
LPDDR  
Y
Device  
Y
OFFSET  
AM335x  
A1  
Recommended LPDDR  
Device Orientation  
Figure 5-34. AM335x Device and LPDDR Device Placement  
Table 5-35. Placement Specifications(1)  
NO.  
1
PARAMETER  
MIN  
MAX  
1750  
1280  
650  
UNIT  
mils  
mils  
mils  
w
X(2)(3)  
Y(2)(3)  
Y Offset(2)(3)(4)  
2
3
4
Clearance from non-LPDDR signal to LPDDR keepout region(5)(6)  
4
(1) LPDDR keepout region to encompass entire LPDDR routing area.  
(2) For dimension definitions, see Figure 5-34.  
(3) Measurements from center of AM335x device to center of LPDDR device.  
(4) For single-memory systems, it is recommended that Y offset be as small as possible.  
(5) w is defined as the signal trace width.  
(6) Non-LPDDR signals allowed within LPDDR keepout region provided they are separated from LPDDR routing layers by a ground plane.  
152  
Peripheral Information and Timings  
Copyright © 2011–2013, Texas Instruments Incorporated  
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352  
 
 
 
 
 
 
 
 
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