ADS62P49 / ADS62P29
ADS62P48 / ADS62P28
www.ti.com............................................................................................................................................................. SLAS635A–APRIL 2009–REVISED JUNE 2009
RESET TIMING (ONLY WHEN SERIAL INTERFACE IS USED)
Typical values at 25°C, min and max values across the full temperature range TMIN = –40°C to TMAX = 85°C (unless otherwise
noted).
PARAMETER
CONDITIONS
MIN
1
TYP
MAX UNIT
t1
t2
t3
Power-on delay
Delay from power-up of AVDD and DRVDD to RESET pulse active
ms
ns
10
Reset pulse width
Pulse width of active RESET signal
1(1)
µs
Register write delay
Delay from RESET disable to SEN active
100
ns
(1) The reset pulse is needed only when using the serial interface configuration. If the pulse width is greater than 1µsec, the device could
enter the parallel configuration mode briefly and then return back to serial interface mode.
Power Supply
AVDD, DRVDD
t1
RESET
t2
t3
SEN
T0108-01
NOTE: A high-going pulse on RESET pin is required in serial interface mode in case of initialization through hardware reset.
For parallel interface operation, RESET has to be tied permanently HIGH.
Figure 10. Reset Timing Diagram
Copyright © 2009, Texas Instruments Incorporated
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