ADS131B04-Q1
ZHCSMK3B –NOVEMBER 2020 –REVISED NOVEMBER 2021
www.ti.com.cn
8.6 Register Map
表 8-11 lists the ADS131B04-Q1 registers. All register addresses not listed in 表 8-11 should be considered as
reserved locations and the register contents should not be modified.
表8-11. Register Map
BIT 15
BIT 7
BIT 14
BIT 13
BIT 12
BIT 11
BIT 3
BIT 10
BIT 2
BIT 9
BIT 1
BIT 8
BIT 0
RESET
VALUE
ADDRESS
REGISTER
BIT 6
BIT 5
BIT 4
DEVICE SETTINGS AND STATUS INDICATORS (Read-Only Registers)
RESERVED
CHANCNT[3:0]
00h
01h
ID
44xxh
0500h
RESERVED
LOCK
F_RESYNC
REG_MAP
CRC_ERR
CRC_TYPE
DRDY3
RESET
DRDY2
WLENGTH[1:0]
STATUS
RESERVED
DRDY1
DRDY0
GLOBAL SETTINGS ACROSS CHANNELS
RESERVED
RESERVED
RESERVED
RESERVED
PGAGAIN3[2:0]
PGAGAIN1[2:0]
REGCRC_EN
RX_CRC_EN
TIMEOUT
CRC_TYPE
RESET
WLENGTH[1:0]
02h
03h
04h
05h
06h
07h
08h
MODE
CLOCK
0510h
0F8Eh
0000h
0000h
0600h
0000h
0000h
RESERVED
DRDY_HiZ
CH1_EN
RESERVED
CH0_EN
CH3_EN
OSR[2:0]
CH2_EN
CLK_SEL
RESERVED
RESERVED
PWR[1:0]
RESERVED
RESERVED
PGAGAIN2[2:0]
PGAGAIN0[2:0]
GAIN
RESERVED
RESERVED
RESERVED
RESERVED
GC_DLY[3:0]
GC_EN
GLOBAL_CHOP_
CFG
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
CHANNEL-SPECIFIC SETTINGS
RESERVED
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
CH0_CFG
0000h
0000h
0000h
8000h
0000h
0000h
0000h
0000h
8000h
0000h
0000h
0000h
0000h
RESERVED
MUX0[1:0]
OCAL0_MSB[15:8]
OCAL0_MSB[7:0]
OCAL0_LSB[7:0]
RESERVED
CH0_OCAL_MSB
CH0_OCAL_LSB
CH0_GCAL_MSB
CH0_GCAL_LSB
CH1_CFG
GCAL0_MSB[15:8]
GCAL0_MSB[7:0]
GCAL0_LSB[7:0]
RESERVED
RESERVED
RESERVED
MUX1[1:0]
OCAL1_MSB[15:8]
OCAL1_MSB[7:0]
OCAL1_LSB[7:0]
RESERVED
CH1_OCAL_MSB
CH1_OCAL_LSB
CH1_GCAL_MSB
CH1_GCAL_LSB
CH2_CFG
GCAL1_MSB[15:8]
GCAL1_MSB[7:0]
GCAL1_LSB[7:0]
RESERVED
RESERVED
RESERVED
MUX2[1:0]
OCAL2_MSB[15:8]
OCAL2_MSB[7:0]
OCAL2_LSB[7:0]
RESERVED
CH2_OCAL_MSB
CH2_OCAL_LSB
Copyright © 2022 Texas Instruments Incorporated
38
Submit Document Feedback
Product Folder Links: ADS131B04-Q1
TI [ TEXAS INSTRUMENTS ]
