ADS1115-Q1
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SBAS563 –DECEMBER 2011
1
9
1
9
¼
SCL
A1(1) A0(1)
R/W
0
0
0
0
0
0
P1
P0
SDA
1
0
0
1
0
Start By
Master
ACK By
ADS1115-Q1
ACK By Stop By
ADS1115-Q1 Master
Frame 1 Two-Wire Slave Address Byte
Frame 2 Pointer Register Byte
1
9
1
9
SCL
¼
(Continued)
SDA
A1(1) A0(1)
¼
0
1
0
0
1
R/W
D15 D14 D13 D12 D11 D10 D9
From
ADS1115-Q1
D8
(Continued)
Start By
Master
ACK By
ADS1115-Q1
ACK By
Master(2)
Frame 3 Two-Wire Slave Address Byte
Frame 4 Data Byte 1 Read Register
1
9
SCL
(Continued)
SDA
D7 D6
D5
D4
D3
D2
D1
D0
(Continued)
From
ADS1115-Q1
ACK By
Master(3)
Stop By
Master
Frame 5 Data Byte 2 Read Register
(1) The values of A0 and A1 are determined by the ADDR pin.
(2) Master can leave SDA high to terminate a single-byte read operation.
(3) Master can leave SDA high to terminate a two-byte read operation.
Figure 30. Two-Wire Timing Diagram for Read Word Format
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