78Q8430 Data Sheet
DS_8430_001
7.7 PHY Management Registers
7.7.1 PHY Register Overview
The 78Q8430 PHY implements sixteen-bit registers which are accessible via the MAC Station
Management Access Registers. The supported registers are shown below. Unsupported registers will be
read as all zeroes. The 78Q8430 PHY responds to PHYAD value 00001b.
The types of PHY Register access are summarized in Table 34.
Table 34: PHY Register Group
Address Symbol Name
Default (Hex)
3100
0
MR0
MR1
MR2
MR3
MR4
MR5
MR6
Control
1
Status
(7849)
000E
2
PHY Identifier 1
3
PHY Identifier 2
7237
4
Auto-Negotiation Advertisement
Auto-Negotiation Link Partner Ability
Auto-Negotiation Expansion
Reserved
(01E1)
0001
5
6
0000
7-15
16
17
18
19
20-22
23
24
0000
MR16
MR17
MR18
MR19
Vendor Specific
(0140)
0000
Interrupt Control/Status
Diagnostic Register
Transceiver Control
Reserved
0000
4XXX
XXXX
0010
MR23
MR24
LED Configuration
MDI/MDIX Control
(00C0)
Notes:
1. These registers can only be accessed indirectly via the MDDAR and MDCAR registers. They cannot
be accessed directly through the GBI address space.
2. The default values annotated with () are dependent on configuration states.
74
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
