DS_8430_001
78Q8430 Data Sheet
7.6.6 Revision ID
Name: ID
Reset Val: 0x8430_0102
Block: CTL
Address: 0x118
Bits
Type
Default Description
31:16
RO
8430
Prod ID
Indicates the product number.
15:8
7:0
RO
RO
2
1
Ver ID
Indicates the product version number.
Rev ID
Indicates the silicon revision number.
7.6.7 Configuration
Name: GBI_CS
Reset Val: 0x0000_0000
Block: CTL
Address: 0x11C
Bits
31:5
4:0
Type
X
Default Description
Reserved
RO
0
CONF
The current status of the configuration pins.
7.6.8 Receive to Transmit Transfer Register
Name: RTTR
Reset Val: 0x0000_0000
Block: CTL
Address: 0x128
Bits
31:1
0
Type
Default Description
X
Reserved
RW
0
Transfer
Writing a one to this bit signals the QUE logic to transfer the QUE0
FIRST BLOCK to QUE3. The QUE logic clears the bit when the
operation is complete.
7.6.9 Frame Disposition Register
Name: FDR Reset Val: 0x0000_0000
Block: CTL
Address: 0x12C
Bits
31:1
0
Type
Default Description
Reserved
W
Drop Rx Frame
Writing a 1 to this bit causes the Rx consumer to drop the current frame
entirely from the QUE.
7.6.10 Receive FIRST BLOCK Status Register
Name: RFBSR
Reset Val: 0x0002_0000
Block: CTL
Address: 0x130
Bits
31:18
17
Type
Default Description
Reserved
R
R
1
0
EOF
The FIRST BLOCK is the end of its frame.
16
ERR
The FIRST BLOCK is the end of a truncated frame.
15
Reserved
14:8
R
R
00
00
Next
The BLOCK that is next in QUE0 after the current FIRST BLOCK.
7:0
Used
The number of valid bytes in the FIRST BLOCK for QUE0.
Rev. 1.2
61
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
