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78Q8430-100IGT/F 参数 Datasheet PDF下载

78Q8430-100IGT/F图片预览
型号: 78Q8430-100IGT/F
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100以太网MAC和PHY [10/100 Ethernet MAC and PHY]
分类和应用: 电信集成电路编码器以太网局域网(LAN)标准
文件页数/大小: 88 页 / 1209 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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78Q8430 Data Sheet  
DS_8430_001  
7.5.6 QUE First/Last Register  
Name: QFLR  
Reset Val: 0x0000_0000  
Block: QUE  
Address: 0x018  
Bits  
Type  
Default Description  
31:23  
22:16  
X
Reserved  
RW  
0x00  
0x00  
Last  
The value of the Last pointer for this QUE.  
15:7  
6:0  
X
Reserved  
RW  
First  
The value of the First pointer for this QUE.  
Note: The default values will vary for static QUEs 2 and 5.  
7.5.7 QUE Status Register  
Name: QSR  
Reset Val: 0x0000_0000  
Block: QUE  
Address: 0x01C  
Bits  
Type Default Description  
31  
RW  
0
QDR  
QUE data is ready.  
30  
RW  
0
Pause Mask  
When set, pause mode has no effect on the QDR bit for this QUE. The  
default behavior when clear is to disallow the setting of the QDR bit in  
pause mode.  
29:26  
25:24  
X
Reserved  
RW  
00  
Mode  
The current QSR value for the QDR mode.  
00 = QDR set when First is not 0  
01 = QDR set when above is set.  
10 = QDR set when LEOP is not zero.  
11 = QDR set when above is set or LEOP is not 0.  
Reserved  
23:19  
18  
X
RO  
0
0
0
EOP  
The QUE contains at least one EOP.  
17  
16  
RO  
RO  
Above  
The Count value is above the threshold.  
Below  
The Count value is below the threshold.  
15  
X
Reserved  
14:8  
RW  
0x00  
Threshold  
The number to compare to Count to determine the above and below  
bits.  
7
X
Reserved  
6:0  
RO  
0x00  
Count  
The total number of BLOCKs assigned to this QUE.  
Note: Only bits 31 and 30 are valid for static QUEs 2 and 5.  
58  
Rev. 1.2