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73M1822-IMR/F 参数 Datasheet PDF下载

73M1822-IMR/F图片预览

型号：	73M1822-IMR/F
PDF下载：	下载PDF文件查看货源
内容描述：	[Consumer Circuit, 8 X 8 MM, ROHS COMPLIANT, QFN-42]
分类和应用：	商用集成电路
文件页数/大小：	82 页 / 1142 K
品牌：	TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]

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DS_1x22_001

73M1822/73M1922 Data Sheet

Tables

Table 1: 73M1902 20-Pin TSSOP Pin Definitions ........................................................................................ 8

Table 2: 73M1912 20-Pin TSSOP Pin Definitions ...................................................................................... 10

Table 3: 73M1902 32-Pin QFN Pin Definitions .......................................................................................... 11

Table 4: 73M1912 32-Pin QFN Pin Definitions .......................................................................................... 13

Table 5: 73M1822 Pin Definitions ............................................................................................................. 15

Table 6: Isolation Barrier Characteristics at 8 kHz Sample Rate ................................................................ 17

Table 7: Absolute Maximum Device Ratings ............................................................................................. 17

Table 8: Recommended Operating Conditions .......................................................................................... 17

Table 9: DC Characteristics ...................................................................................................................... 18

Table 10: Serial Data Port Timing at 8 kHz Sample Rate........................................................................... 19

Table 11: Reference Voltage Specifications .............................................................................................. 19

Table 12: Component Values for the Speaker Driver ................................................................................. 20

Table 13: Call Progress Monitor Specification ........................................................................................... 21

Table 14: Line-Side Absolute Maximum Ratings ....................................................................................... 22

Table 15: VBG Specifications ................................................................................................................... 22

Table 16: Maximum Transmit Levels ......................................................................................................... 22

Table 17: Maximum DC Transmit Levels ................................................................................................... 23

Table 18: Transmit Path............................................................................................................................ 24

Table 19: Receive Path ............................................................................................................................ 25

Table 20: Transmit Hybrid Cancellation Characteristics ............................................................................. 26

Table 21: Receive Notch Filter .................................................................................................................. 26

Table 22: Over-Voltage Detector............................................................................................................... 27

Table 23: Over-Current Detector ............................................................................................................... 27

Table 24: Under-Voltage Detector ............................................................................................................. 27

Table 25: Over-Load Detector ................................................................................................................... 27

Table 26: Reference Bill of Materials for 73M1822/73M1922..................................................................... 30

Table 27: Reference Bill of Materials for Figure 12 .................................................................................... 31

Table 28: Compatible Pulse Transformer Sources .................................................................................... 32

Table 29: Transformer Characteristics ...................................................................................................... 32

Table 30: Control and Status Register Map ............................................................................................... 33

Table 31: Alphabetical Bit Map ................................................................................................................. 34

Table 32: Clock Generation Register Settings for Fxtal = 27 MHz ............................................................. 43

Table 33: Clock Generation Register Settings for Fxtal = 24.576 MHz....................................................... 43

Table 34: Clock Generation Register Settings for Fxtal = 9.216 MHz......................................................... 43

Table 35: Clock Generation Register Settings for Fxtal = 24.000 MHz....................................................... 44

Table 36: Clock Generation Register Settings for Fxtal = 25.35 MHz......................................................... 44

Table 37: PLL System Timing Controls ..................................................................................................... 45

Table 38: Behavior of SCLK under SCKM................................................................................................. 48

Table 39: Signal Control Functions ........................................................................................................... 55

Table 40: Transmit Gain Control ............................................................................................................... 55

Table 41: Receive Gain Control ................................................................................................................ 56

Table 42: Barrier Control Functions........................................................................................................... 59

Table 43: Trans-Hybrid Cancellation ......................................................................................................... 65

Table 44: DAA Control Functions .............................................................................................................. 65

Table 45: Recommended Register Settings for International Compatibility ................................................ 69

Table 46: Line Sensing Control Functions ................................................................................................. 72

Table 47: Loopback Modes....................................................................................................................... 75

Table 48: Loopback Controls .................................................................................................................... 76

Table 49: Order Numbers and Packaging Marks ....................................................................................... 81

Rev. 1.6

5

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