DS_1x22_017
73M1822/73M1922 Data Sheet
10.6 Barrier Control Functions
Table 42: Barrier Control Functions
Type Description
Function
Mnemonic Location
Register
ENLPW
0x02[2]
W
Enable Line Power
0 = Barrier Powered Mode is selected. (Default)
1 = Line Powered Mode is selected.
Bit ENLVD must have the value of 0 before switching from Line
Powered Mode to Barrier Powered Mode. Otherwise level
detection is disabled and the transition to Barrier Powered Mode
will not occur.
SYNL
0x03[1]
0x05[3]
0x05[1]
0x0D[6]
R
W
W
R
Barrier Synchronization Loss
0 = Indicates synchronization of data across the barrier.
1 = Indicates a loss of synchronization of data across the barrier.
This status bit is reset when read. This is a maskable interrupt. It is
enabled by the ENSYNL bit.
ENAPOL
ENSYNL
SLHS
Enable Automatic Polling
0 = Disables automatic polling.
1 = Initiates automatic polling of the 73M1x22 Line-Side Device ID
upon the establishment of the barrier SYN. (Default)
If SYN is lost, the Device ID will be reset to 0000.
Enable Synchronization Loss Detection Interrupt
0 = Disables Synch Loss Detection Interrupt.
1 = Enables Synch Loss Detection Interrupt. (Default) When the
73M1x22 detects a loss of synchronization in the Host-Side Barrier
Interface, SYNL 0x03[1] will be set and reset when read.
Synchronization Loss Host Side
This bit indicates the status of the Barrier Interface as seen from the
Host-Side.
0 = Host-Side Barrier Interface is synchronized.
1 = Host-Side Barrier Interface lost synchronization. (Default)
Once read, the SLHS bit is reset, but will be set again if the
synchronization loss continues.
DISNTR
0x15[6]
0x1E[2]
WO Disable No-Transition Timer
If enabled, the No-Transition Timer is a safety feature. If the barrier
fails, i.e. no transition is detected for 400 µs, the Line-Side Device
resets itself and goes on hook to prevent line holding in a failure
condition.
0 = Enables No-Transition Timer of 400 µs. (Default)
1 = Disables No-Transition Timer.
SLLS
W
Synchronization Loss Line Side
0 = TXRDY will continuously be generated following Synchronization
Loss so as to allow SLLS information to be transferred across the
barrier. This causes an automatic transfer of 1Eh. (Default)
1 = Synchronization is lost in the Line-Side Device due to Header.
Rev. 1.6
59
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
