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UPSD3412C-24U6T 参数 Datasheet PDF下载

UPSD3412C-24U6T图片预览
型号: UPSD3412C-24U6T
PDF下载: 下载PDF文件 查看货源
内容描述: 闪存可编程系统设备与8032单片机内核和16Kbit的SRAM [Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM]
分类和应用: 闪存静态存储器微控制器
文件页数/大小: 152 页 / 1492 K
品牌: STMICROELECTRONICS [ ST ]
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UPSD3212C, UPSD3212CV  
Erasing Flash Memory  
During execution of the Erase cycle, the Flash  
memory accepts only RESET and Suspend Sec-  
tor Erase instructions. Erasure of one Flash mem-  
ory sector may be suspended, in order to read  
data from another Flash memory sector, and then  
resumed.  
Suspend Sector Erase. When a Sector Erase  
cycle is in progress, the Suspend Sector Erase in-  
struction can be used to suspend the cycle by writ-  
ing 0B0h to any address when an appropriate  
Sector Select (FS0-FS3 or CSBOOT0-CSBOOT1)  
is High. (See Table 62). This allows reading of  
data from another Flash memory sector after the  
Erase cycle has been suspended. Suspend Sec-  
tor Erase is accepted only during an Erase cycle  
and defaults to READ Mode. A Suspend Sector  
Erase instruction executed during an Erase time-  
out period, in addition to suspending the Erase cy-  
cle, terminates the time out period.  
Flash Bulk Erase. The Flash Bulk Erase instruc-  
tion uses six WRITE operations followed by a  
READ operation of the status register, as de-  
scribed in Table 62. If any byte of the Bulk Erase  
instruction is wrong, the Bulk Erase instruction  
aborts and the device is reset to the READ Flash  
memory status.  
During a Bulk Erase, the memory status may be  
checked by reading the Error Flag Bit (DQ5), the  
Toggle Flag Bit (DQ6), and the Data Polling Flag  
Bit (DQ7), as detailed in the section entitled “Pro-  
gramming Flash Memory,” page 89. The Error  
Flag Bit (DQ5) returns a '1' if there has been an  
Erase Failure (maximum number of Erase cycles  
have been executed).  
It is not necessary to program the memory with  
00h because the PSD MODULE automatically  
does this before erasing to 0FFh.  
The Toggle Flag Bit (DQ6) stops toggling when the  
internal logic is suspended. The status of this bit  
must be monitored at an address within the Flash  
memory sector being erased. The Toggle Flag Bit  
(DQ6) stops toggling between 0.1µs and 15µs af-  
ter the Suspend Sector Erase instruction has been  
executed. The Flash memory is then automatically  
set to READ Mode.  
If an Suspend Sector Erase instruction was exe-  
cuted, the following rules apply:  
– Attempting to read from a Flash memory sector  
that was being erased outputs invalid data.  
During execution of the Bulk Erase instruction, the  
Flash memory does not accept any instructions.  
Flash Sector Erase. The Sector Erase instruc-  
tion uses six WRITE operations, as described in  
Table 62. Additional Flash Sector Erase codes  
and Flash memory sector addresses can be writ-  
ten subsequently to erase other Flash memory  
sectors in parallel, without further coded cycles, if  
the additional bytes are transmitted in a shorter  
time than the time-out period of about 100µs. The  
input of a new Sector Erase code restarts the time-  
out period.  
– Reading from a Flash sector that was not being  
erased is valid.  
– The Flash memory cannot be programmed, and  
only responds to Resume Sector Erase and  
Reset Flash instructions (READ is an operation  
and is allowed).  
– If a Reset Flash instruction is received, data in  
the Flash memory sector that was being erased  
is invalid.  
The status of the internal timer can be monitored  
through the level of the Erase Time-out Flag Bit  
(DQ3). If the Erase Time-out Flag Bit (DQ3) is '0,'  
the Sector Erase instruction has been received  
and the time-out period is counting. If the Erase  
Time-out Flag Bit (DQ3) is '1,' the time-out period  
has expired and the embedded algorithm is busy  
erasing the Flash memory sector(s). Before and  
during Erase time-out, any instruction other than  
Suspend Sector Erase and Resume Sector Erase  
instructions abort the cycle that is currently in  
progress, and reset the device to READ Mode.  
During a Sector Erase, the memory status may be  
checked by reading the Error Flag Bit (DQ5), the  
Toggle Flag Bit (DQ6), and the Data Polling Flag  
Bit (DQ7), as detailed in the section entitled “Pro-  
gramming Flash Memory,” page 89.  
Resume Sector Erase. If  
a
Suspend Sector  
Erase instruction was previously executed, the  
erase cycle may be resumed with this instruction.  
The Resume Sector Erase instruction consists of  
writing 030h to any address while an appropriate  
Sector Select (FS0-FS3 or CSBOOT0-CSBOOT1)  
is High. (See Table 62.)  
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