UPSD3212C, UPSD3212CV
Figure 29. Serial Port Mode 1, Block Diagram
Timer1
Timer2
Overflow
Internal Bus
SBUF
Overflow
TB8
S
Write
to
SBUF
D
TxD
Q
÷2
CL
0
1
Zero Detector
SMOD
0
0
1
Shift
Data
Start
TCLK
Tx Control
TI
Send
÷16
Tx Clock
Serial
1
Port
Interrupt
RCLK
÷16
Sample
1-to-0
Transition
Detector
Load SBUF
Shift
RI
Rx Clock
Start
Rx Control
1FFh
Rx Detector
Input Shift Register
Load
SBUF
RxD
Shift
SBUF
Read
SBUF
Internal Bus
AI06826
Figure 30. Serial Port Mode 1, Waveforms
Tx Clock
Write to SBUF
S1P1
Send
Transmit
Data
Shift
Start Bit
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
TxD
T1
Stop Bit
Stop Bit
÷16 Reset
Rx Clock
RxD
Start Bit
D0
Receive
Bit Detector
Sample Times
Shift
RI
AI06843
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