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UPSD3412C-24U6T 参数 Datasheet PDF下载

UPSD3412C-24U6T图片预览
型号: UPSD3412C-24U6T
PDF下载: 下载PDF文件 查看货源
内容描述: 闪存可编程系统设备与8032单片机内核和16Kbit的SRAM [Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM]
分类和应用: 闪存静态存储器微控制器
文件页数/大小: 152 页 / 1492 K
品牌: STMICROELECTRONICS [ ST ]
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UPSD3212C, UPSD3212CV  
Product Term Allocator  
The CPLD has a Product Term Allocator. PSDsoft  
uses the Product Term Allocator to borrow and  
place product terms from one macrocell to anoth-  
er. The following list summarizes how product  
terms are allocated:  
This is called product term expansion. PSDsoft  
Express performs this expansion as needed.  
Loading and Reading the Output Macrocells  
(OMC). The Output Macrocells (OMC) block oc-  
cupies a memory location in the MCU address  
space, as defined by the CSIOP block (see the  
section entitled “I/O PORTS (PSD MODULE),” on  
page 104). The flip-flops in each of the 16 Output  
Macrocells (OMC) can be loaded from the data  
bus by a MCU. Loading the Output Macrocells  
(OMC) with data from the MCU takes priority over  
internal functions. As such, the preset, clear, and  
clock inputs to the flip-flop can be overridden by  
the MCU. The ability to load the flip-flops and read  
them back is useful in such applications as load-  
able counters and shift registers, mailboxes, and  
handshaking protocols.  
McellAB0-McellAB7 all have three native  
product terms and may borrow up to six more  
McellBC0-McellBC3 all have four native product  
terms and may borrow up to five more  
McellBC4-McellBC7 all have four native product  
terms and may borrow up to six more.  
Each macrocell may only borrow product terms  
from certain other macrocells. Product terms al-  
ready in use by one macrocell are not available for  
another macrocell.  
If an equation requires more product terms than  
are available to it, then “external” product terms  
are required, which consume other Output Macro-  
cells (OMC). If external product terms are used,  
extra delay is added for the equation that required  
the extra product terms.  
Data can be loaded to the Output Macrocells  
(OMC) on the trailing edge of WRITE Strobe (WR,  
edge loading) or during the time that WRITE  
Strobe (WR) is active (level loading). The method  
of loading is specified in PSDsoft Express Config-  
uration.  
Figure 51. CPLD Output Macrocell  
MASK  
REG.  
MACROCELL CS  
RD  
MCU DATA BUS  
[
]
D 7:0  
WR  
PT  
ALLOCATOR  
DIRECTION  
REGISTER  
(
)
ENABLE .OE  
(
)
PRESET .PR  
COMB/REG  
SELECT  
PT  
PT  
DIN PR  
LD  
MUX  
I/O PIN  
MACROCELL  
ALLOCATOR  
Q
PT  
POLARITY  
SELECT  
IN  
CLR  
PROGRAMMABLE  
PORT  
DRIVER  
(
)
CLEAR .RE  
(
)
FF D/T/JK/SR  
PT CLK  
CLKIN  
MUX  
(
)
FEEDBACK .FB  
PORT INPUT  
INPUT  
MACROCELL  
AI06617  
102/152  
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