CONTROLLER AREA NETWORK (bxCAN)
CAN DIAGNOSIS REGISTER (CDGR)
CONTROLLER AREA NETWORK (Cont’d)
TRANSMIT ERROR COUNTER REG. (TECR)
Read Only
All bits of this register are set and clear by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
Reset Value: 00h
7
0
7
0
0
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0
0
0
0
RX
SAMP SILM LBKM
TEC[7:0] is the least significant byte of the 9-bit
Transmit Error Counter implementing part of the
fault confinement mechanism of the CAN protocol.
Bit 3 = RX CAN Rx Signal
- Read
Monitors the actual value of the CAN_RX Pin.
RECEIVE ERROR COUNTER REG. (RECR)
Page: 00h — Read Only
Bit 2 = SAMP Last Sample Point
- Read
The value of the last sample point.
Reset Value: 00h
7
0
Bit 1 = SILM Silent Mode
- Read/Set/Clear
REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
0: Normal operation
1: Silent Mode
REC[7:0] is the Receive Error Counter implement-
ing part of the fault confinement mechanism of the
CAN protocol. In case of an error during reception,
this counter is incremented by 1 or by 8 depending
on the error condition as defined by the CAN stand-
ard. After every successful reception the counter is
decremented by 1 or reset to 120 if its value was
higher than 128. When the counter value exceeds
127, the CAN controller enters the error passive
state.
Bit 0 = LBKM Loop Back Mode
- Read/Set/Clear
0: Loop Back Mode disabled
1: Loop Back Mode enabled
347/426
9
STMICROELECTRONICS [ ST ]
