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POWERSTEP01 参数 Datasheet PDF下载

POWERSTEP01图片预览
型号: POWERSTEP01
PDF下载: 下载PDF文件 查看货源
内容描述: [powerSTEP01是system-in-package集成16 mΩ8 n沟道mosfet为步进应用程序85 V SPI可编程序控制器,提供全数字控制的运动通过一个概要文件生成和定位的计算速度]
分类和应用: 控制器
文件页数/大小: 90 页 / 2982 K
品牌: STMICROELECTRONICS [ ST ]
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Functional description  
powerSTEP01  
Table 8. UVLO thresholds  
UVLOVAL  
0
1
Low-side gate driver supply turn-off threshold  
(VCCthOff  
6.3 V  
6.9 V  
5.5 V  
6 V  
10 V  
)
Low-side gate driver supply turn-on threshold  
(VCCthOn  
10.4 V  
8.8 V  
9.2 V  
)
High-side gate driver supply turn-off threshold  
(DVBOOTthOff  
)
High-side gate driver supply turn-on threshold  
(DVBOOTthOff  
)
7.11  
V undervoltage lockout (UVLO_ADC)  
S
The device provides an undervoltage signal of the integrated ADC input voltage (the  
UVLO_ADC flag in the STATUS register). When VADCIN falls below the VADC,UVLO value the  
UVLO_ADC flag is forced low and it is kept in this state until the ADCIN voltage is greater  
than VADC,UVLO and a GetStatus command is sent to the device.  
The ADCIN undervoltage event doesn’t turn off the power bridges.  
The motor supply voltage undervoltage detection can be performed by means of this  
feature, connecting the ADCIN pin to VS through a voltage divider as described in  
Section 8.5.  
7.12  
Thermal warning and thermal shutdown  
An integrated sensor allows detection of the internal temperature and implementation of a 3-  
level protection.  
When the Tj(WRN)Set threshold is reached, a warning signal is generated. This is the thermal  
warning condition and it expires when the temperature falls below the Tj(WRN)Rel threshold.  
When the Tj(OFF)Set threshold is reached, all the MOSFETs are turned off and the gate  
driving circuitry is disabled (Miller clamps are still operative). This condition expires when  
the temperature falls below the Tj(OFF)Rel threshold.  
When the Tj(SD)OFF threshold is reached, all the MOSFETs are turned off using Miller  
clamps, the internal VCC voltage regulator is disabled and the current capability of the  
internal VREG voltage regulator is reduced (thermal shutdown). In this condition logic is still  
active (if supplied). The thermal shutdown condition only expires when the temperature  
goes below Tj(SD)ON  
.
The thermal condition of the device is shown by TH_STATUS bits in the STATUS register  
(Table 9).  
32/90  
DocID025022 Rev 1  
 
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