powerSTEP01
Functional description
Figure 13. Overcurrent detection - principle scheme
VS
LOGIC CORE
OCD_HSxx
+
-
Voltage
Comparator
BLANKING
OCD_LSxx
OUTxx
CURRENT
DAC
OC
THRESHOLD
Voltage
Comparator
+
-
GND
GND
AM16762v1
The overcurrent detection comparators are disabled, in order to avoid wrong voltage
measurements, in following cases:
•
•
•
The respective half-bridge is in high impedance state (both MOSFETs forced off);
The respective half-bridge is commutating;
The respective half-bridge is commutated and the programmed blanking time is not
elapsed yet;
•
The respective gate is turned off.
It is possible to set if an overcurrent event causes the bridges turn-off or not through the
OC_SD bit in CONFIG register.
When the power bridges are turned off by an overcurrent event, they cannot be turned on
until the OCD flag is released by a GetStatus command.
7.10
Undervoltage lockout (UVLO)
The powerSTEP01 provides a programmable gate driver supply voltage UVLO protection.
When one of the supply voltages of the gate driver (VCC for the low sides and VBOOT - VS for
the high-sides) falls below the respective turn-off threshold, an undervoltage event occurs.
In this case, all MOSFETs are immediately turned off and the UVLO flag in the STATUS
register is forced low.
The UVLO flag is forced low and the MOSFETs are kept off until the gate driver supply
voltages return to above the respective turn-on threshold; in this case the undervoltage
event expires and the UVLO flag can be released through a GetStatus command.
The UVLO thresholds can be selected between two sets according to the UVLOVAL bit
value in the CONFIG register.
DocID025022 Rev 1
31/90
STMICROELECTRONICS [ ST ]
