CY28346-2
66B
1.5-
3.5ns
PCI
PCIF
Figure 12. Buffer Mode – 33V66(0:1); 66BUF(0:2) Phase Relationship
3V66
Tpci
PCI
PCIF
Figure 13. Unbuffered Mode – 3V66(0:5) to PCI (0:6) and PCIF(0:2) Phase Relationship
Buffer Characteristics
Current Mode CPU Clock Buffer Characteristics
The current mode output buffer detail and current reference
circuit details are contained in the previous table of this data
sheet. The following parameters are used to specify output
buffer characteristics:
1. Output impedance of the current mode buffer circuit – Ro
(see Figure 14).
2. Minimum and maximum required voltage operation range
of the circuit – Vop (see Figure 14).
3. Series resistance in the buffer circuit – Ros (see Figure 14).
4. Current accuracy at given configuration into nominal test
load for given configuration.
VDD3 (3.3V +/- 5%)
Slope ~ 1/R0
Ro
Iout
Ros
0V
1.2V
Iout
Vout = 1.2V max
Vout
Figure 14.
Rev 1.0,November 20, 2006
Page 13 of 19