CXD1968AR
CAS_FREQ
Read/Write
RESET: 0xB3
Default R/W
Offset Address: 0x0F
Bit
Name
Description
Sets the center frequency of the co-channel suppression filter. The
actual frequency (in MHz) is equal to;
CCS center frequency = CCS_Freq × channel BW / 224
CCS_Freq is an 8-bit signed number and the reset value of
–77 corresponds to a center of frequency of –2.75MHz in 8MHz
channels. This is the same frequency as the vision carrier of PAL
signals and thus centers the co-channel suppression filter on the
vision carrier.
7:0 CCS_Freq
B3h
R/W
Note) 1. The co-channel suppression filter is automatically enabled by the enhanced symbol tracking
block to remove co-channel interference whenever it is detected. It is also automatically enabled
during acquisition. It is therefore important to program the CAS_FREQ register with the nominal
frequency of the vision carrier of the likely CCI interference. Example values are given below.
2. For optimum performance this setting should be modified if the transmitter carrier frequency is
offset, also shown in this table.
CCS_Freq for COFDM offset
CCS_Freq = (Fvc – Foffset) × 224 / BW
Vision carrier
nominal
Channel
BW
position [MHz]
[MHz]
–500kHz –333kHz –166kHz
0kHz
166kHz 333kHz 500kHz
–47
(D1h)
–53
(CBh)
–59
(C5h)
–65
(BFh)
–72
(B8h)
–78
(B2h)
–84
(ACh)
–1.75
–2.25
–2.75
6
7
8
–56
(C8h)
–61
(C3h)
–67
(BDh)
–72
(B8h)
–77
(B3h)
–83
(ADh)
–88
(A8h)
–63
(C1h)
–68
(BCh)
–72
(B8h)
–77
(B3h)
–82
(AEh)
–86
(AAh)
–91
(A5h)
CAS_DAGCGAIN
Read Only
Offset Address: 0x10
Bit
Name
Description
Default R/W
Digital automatic gain controller gain indication from CAS
block. The actual gain of the digital AGC can be read from this
register and is coded as follows.
7:0 CAS DAGC Gain
—
R
Actual gain = CAS DAGC Gain / 16
Therefore a gain of “1” is equivalent to a setting of “16” in this
register.
TEST9
Read/Write
Description
RESET: 0x00
Default R/W
Offset Address: 0x11
Bit
7
Name
TEST9[7]
0
00h
0
R/W
R/W
R/W
6:3 TEST9[6:3]
2
1
0
TEST9[2]
TEST9[1]
TEST9[0]
0
0
R/W
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SONY [ SONY CORPORATION ]
