CXD1968AR
ITB_CTL
Read/Write
RESET: 0x00
Default R/W
Offset Address: 0x0B
Bit
7:1 Reserved
Spec Invert
Name
Description
00h
0
R/W
R/W
0
Set to allow reversed frequency spectrum from tuner
ITB_FREQ_1
Read/Write
RESET: 0x00
Offset Address: 0x0C
See table below for recommended values.
Description Default R/W
Bit
Name
7:0 ITB Frequency[7:0] Bits 7:0 of ITB frequency
00h
R/W
ITB_FREQ_2
Read/Write
RESET: 0x30
Offset Address: 0x0D
See table below for recommended values.
Bit
Name
Description
Default R/W
7:6 Reserved
00
R/W
R/W
5:0 ITB Frequency[13:8]
Bits 13:8 of ITB frequency
30h
Note) The ITB_FREQ_1, 2 registers set the nominal IF frequency that is expected to be sampled by the
ADC.
–1 × FIF
FADC
--------------------
ITBFREQ =
× 16384
If the IF is being undersampled (e.g. for High IFs) then FIF is the subsampled IF equal to;
2 × FADC – FIF. e.g. for 36.125MHz IF with a 20.48MHz ADC clock, FIF = 4.835MHz.
IF [MHz]
4.57
FIF [MHz]
4.57
FADC [MHz]
20.48
ITBFREQ
–3657 (31B7h)
–3968 (3080h)
–3868 (30E4h)
–3835 (3105h)
–3863 (30E9h)
–3996 (3064h)
36.00
4.96
20.48
36.125
36.1667
36.1667
36.0
4.835
4.7933
4.8333
5.0
20.48
20.48
20.50
20.50
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SONY [ SONY CORPORATION ]
