CXA3106Q
Programmable Counter Output (during test mode)
The programmable counter output is TTL output from the DIVOUT pin.
(See the I/O Timing Chart.)
This output is normally not used.
Register: DIVOUT Enable
DIVOUT output status
1
0
ON
OFF
TLOAD input (during test mode)
This control signal forcibly loads the control register contents to the programmable counter.
This signal is normally not used.
TLOAD
L
H
Forced load control status
Function OFF Function ON
VCO input (during test mode)
This is the programmable counter test signal input pin.
This pin can be switched internally by the MUX circuit.
TTL and PECL input are possible.
This pin is normally not used.
Register: VCO By-pass
Input status
0
1
Internal VCO External input
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