CXA3106Q
Item
Symbol
Tj1p-p
Conditions
Min.
Typ.
4.0
Max.
7.0
Unit
CLK (CLK, CLK/2) output
triggered at SYNC
Fsync = 15.73kHz
(Crystal)
Fclk = 12.27MHz
N = 780
CLK vs. SYNC output jitter
(NTSC)
ns
Fine Delay =
2/16 to 20/16
triggered at SYNC
Fsync = 31.47kHz
(Crystal)
Fclk = 25.18MHz
N = 800
CLK vs. SYNC output jitter
(VGA)
Tj2p-p
Tj3p-p
3.0
2.0
1.6
5.0
3.0
2.5
ns
ns
triggered at SYNC
Fsync = 48.08kHz
(Crystal)
Fclk = 50.00MHz
N = 1040
CLK vs. SYNC output jitter
(SVGA)
triggered at SYNC
Fsync = 56.48kHz
(Crystal)
Fclk = 75.00MHz
N = 1328
CLK vs. SYNC output jitter
(XGA)
Tj4p-p
Tj5p-p
ns
ns
CLK vs. DSYNC output jitter
Control registers
triggered at DSYNC
0.1
12
SCLK frequency
SCLK
TENS
in write/read mode
in write mode
MHz
ns
SENABLE setup time
3
SENABLE hold time
SDATA setup time
SDATA hold time
TENH
TDS
in write mode
in write mode
in read mode
0
3
0
ns
ns
ns
TDH
SENABLE setup time
SENABLE hold time
TNENS
TNENH
in read mode
in read mode
3
0
ns
ns
– 15 –
SONY [ SONY CORPORATION ]
