CXA2101AQ
B-DRIVE
CLP-MSK
(6) : B channel drive gain control
0h = –4.2dB
29h = 0dB
3Fh = +2.1dB
(2) : Switching of clamping pulse width in various ways (refer to description of H-WIDTH
register)
Gating at one of the SCP CLP pulse widths listed below.
0 = CLP, in its original form, serves as clamping pulse.
1 = Gating at SELH-OUT side of register "H-WIDTH"
2 = Gating at clamping pulse generation block side of register "H-WIDTH"
3 = Prohibited
R-CUTOFF
ABL-MODE
G-CUTOFF
(6) : R channel cut-off control
(Level control of IKIN (Pin 41) R channel reference pulse)
0h = –9.1dB
1Fh = 0dB
3Fh = +4.4dB
(2) : Switching of ABL mode
0 = Picture ABL-only mode
1 = Picture/brightness ABL mode: Low
2 = Picture/brightness ABL mode: Medium
3 = Picture/brightness ABL mode: High
(6) : G channel cut-off control
(Level control of IKIN (Pin 41) G channel reference pulse)
0h = –9.1dB
1Fh = 0dB
3Fh = +4.4dB
ABL-TH
(2) : Adjustment of threshold voltage for ABL-IN (Pin 44) input
0 = 1.3V
3 = 3.3V
B-CUTOFF
(6) : B channel cut-off control
(Level control of IKIN (Pin 41) B channel reference pulse)
0h = –9.1dB
1Fh = 0dB
3Fh = +4.4dB
SUB-BRIGHT (6) : Sub-brightness control
Setting for output DC bias of RGBOUT
0h = –13 IRE
1Fh = CENTER
3Fh = +13 IRE
– 22 –
SONY [ SONY CORPORATION ]
