Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Logical Device I/O Address
Table 11.7 and Table 11.8 summarize the logical device I/O addresses when LD_NUM bit is 0 and 1.
Table 11.7 – Logical Device I/O Address, LD_NUM Bit = 0
LOGICAL
DEVICE
NUMBER
0x00
BASE I/O
RANGE
LOGICAL
DEVICE
REGISTER
INDEX
FIXED
(NOTE 1)
BASE OFFSETS
FDC
0x60,0x61
[0x0100:0x0FF8]
+0 : SRA
+1 : SRB
+2 : DOR
+3 : TSR
ON 8 BYTE BOUNDARIES
+4 : MSR/DSR
+5 : FIFO
+7 : DIR/CCR
0x01
Parallel
Port
0x60,0x61
[0x0100:0x0FFC]
+0 : Data/ecpAfifo
+1 : Status
ON 4 BYTE BOUNDARIES
(EPP Not supported)
or
+2 : Control
+400h : cfifo/ecpDfifo/tfifo/cnfgA
+401h : cnfgB
[0x0100:0x0FF8]
ON 8 BYTE BOUNDARIES
(all modes supported,
EPP is only available when
+402h : ecr
+3 : EPP Address
+4 : EPP Data 0
the base address is on an 8- +5 : EPP Data 1
byte boundary)
+6 : EPP Data 2
+7 : EPP Data 3
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
0x02
0x03
0x04
Serial Port 2
Serial Port
0x60,0x61
0x60,0x61
[0x0100:0x0FF8]
ON 8 BYTE BOUNDARIES
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
[0x0100:0x0FF8]
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
ON 8 BYTE BOUNDARIES
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
Power Control 0x60,0x61
[0x0000:0x0FE0]
+00 : PME Status
.
on 32-byte boundaries
.
.
+1F : Reserved
(See Table 8.1 for Full List)
+0 : Data Register
+4 : Command/Status Reg.
+0 : Data Register
+4 : Command/Status Reg.
+00 : GP10
0x05
0x06
0x07
Mouse
KYBD
GPIO
n/a
Not Relocatable
n/a
Not Relocatable
Fixed Base Address: 60,64
[0x0000:0x0FE0]
0x60,0x61
on 32-byte boundaries
.
.
+1F : Reserved
(See Table 9.1 for Full List)
SMSC LPC47M182
181
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
DATASHEET
SMSC [ SMSC CORPORATION ]
