Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note: A DMA channel is activated by setting the DMA Channel Select register to [0x01-0x03] AND :
For the FDC logical device by setting DMAEN, bit D3 of the Digital Output Register.
For the PP logical device in ECP mode by setting dmaEn, bit D3 of the ecr.
The DMA channel must be disabled if not used/selected by any Logical Device. Refer to Note A.
Note 1: The default value of the DMA Channel Select register for logical device 0 (FDD) is 0x02 and for
logical device 3 is 0x04.
Note A. Logical Device IRQ and DMA Operation
1. IRQ and DMA Enable and Disable: Any time the IRQ or DMA channel for a logical block is disabled by a register bit
in that logical block, the IRQ and/or DMA channel must be disabled. This is in addition to the IRQ and DMA
channel disabled by the Configuration Registers (active bit or address not valid).
A. FDC: For the following cases, the IRQ and DMA channel used by the FDC are disabled.
Digital Output Register (Base+2) bit D3 (DMAEN) set to “0”.
The FDC is in power down (disabled).
B. Serial Port:
Modem Control Register (MCR) Bit D2 (OUT2) - When OUT2 is a logic “0”, the serial port interrupt is disabled.
C. Parallel Port:
I. SPP and EPP modes: Control Port (Base+2) bit D4 (IRQE) set to “0”, IRQ is disabled.
ii. ECP Mode:
(1) (DMA) dmaEn from ecr register. See table.
(2) IRQ - See table.
MODE
(FROM ECR REGISTER)
IRQ
DMA
CONTROLLED BY
CONTROLLED BY
000
001
010
011
100
101
110
111
PRINTER
SPP
FIFO
ECP
EPP
RES
TEST
CONFIG
IRQE
IRQE
(on)
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
(on)
IRQE
IRQE
(on)
IRQE
D. Keyboard Controller: Refer to the KBD section of this spec.
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
180
SMSC LPC47M182
DATASHEET
SMSC [ SMSC CORPORATION ]
