Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
LOGICAL DEVICE
REGISTER
I/O Base Address
ADDRESS
DESCRIPTION
(0x60-0x6F) Registers 0x60 and 0x61 set the base address
for the device. If more than one base address
is required, the second base address is set by
0x60,2,... =
(see Device Base I/O
Address Table)
registers 0x62 and 0x63.
addr[15:8]
Unused registers will ignore writes and return
zero when read.
0x61,3,... =
addr[7:0]
Default = 0x00
on VCC POR, VTR POR,
Note:
If the I/O Base Addr of the logical
HARD RESET and
device is not within the Base I/O range as
shown in the Logical Device I/O map, then
read or write is not valid and is ignored.
SOFT RESET
Interrupt Select
Defaults :
(0x70,0x72) 0x70 is implemented for each logical device.
Refer to Interrupt Configuration Register
description. Only the keyboard controller uses
Interrupt Select register 0x72. Unused register
(0x72) will ignore writes and return zero when
read. Interrupts default to edge high (ISA
compatible).
0x70 = 0x00 or 0x06
(Note)
on VCC POR, VTR POR,
HARD RESET and
SOFT RESET
Refer to Table 11.5
0x72 = 0x00,
Note: The default value of the Primary
Interrupt Select register for logical device 0 is
0x06.
on VCC POR, VTR POR,
HARD RESET and
SOFT RESET
(0x71,0x73) Reserved - not implemented. These register
locations ignore writes and return zero when
read.
DMA Channel Select
(0x74,0x75) Only 0x74 is implemented for FDC and Parallel
port. 0x75 is not implemented and ignores
writes and returns zero when read. Refer to
Table 11.6.
Default = 0x02 or 0x04
(Note)
on VCC POR, VTR POR,
Note: The default value of the DMA Channel
Select register for logical device 0 (FDD) is
0x02 and for logical device 4 (UART) is 0x04.
HARD RESET and
SOFT RESET
32-Bit Memory Space
Configuration
(0x76-0xA8) Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Logical Device
(0xA9-0xDF) Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Logical Device
Configuration
(0xE0-0xFE) Reserved – Vendor Defined (see SMSC
defined Logical Device Configuration
Registers).
Reserved
0xFF
Reserved
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
178
SMSC LPC47M182
DATASHEET
SMSC [ SMSC CORPORATION ]
