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LPC47S45X 参数 Datasheet PDF下载

LPC47S45X图片预览
型号: LPC47S45X
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的I / O与X -Bus接口 [Advanced I/O with X-Bus Interface]
分类和应用:
文件页数/大小: 259 页 / 1575 K
品牌: SMSC [ SMSC CORPORATION ]
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6.18.1 SMBUS PROTOCOLS SUPPORTED BY SMBUS2  
The SMBus2 supports two of the command protocols defined in the System Management Bus Specification, v1.1.  
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Write Byte  
Read Byte  
After an SMBus transaction has been started, the first byte transmitted is always the Slave Address. Once a  
device acknowledges ownership of the slave address, the next byte transmitted by the host/master is the  
command code. Each byte transferred on the bus must be followed by an acknowledge bit. Bytes are  
transferred with the most significant bit (MSB) first.  
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The Read Byte and Write Byte protocols are shown.  
S
= Start  
Master to  
Slave  
R/W = Read/Write  
Slave to  
Master  
A
P
= Acknowledge  
= Stop Condition  
S
Slave Address  
Wr  
A
Command Code  
A
Data Byte  
A
P
FIGURE 9 WRITE BYTE PROTOCOL  
S
Slave Address  
Wr  
A
Command Code  
A
S
Slave Address  
Rd  
A
Data Byte  
A P  
FIGURE 10 READ BYTE PROTOCOL  
Note 1: In the Read Byte Protocol there is no stop condition before the repeated start condition, and a “Not  
ACKnowledge” signifies the end of the read transfer.  
6.18.2 COMMAND CODES  
SMBus2 can access the SMBus2 Registers, nXCS0, XCS1, nXCS2, and nXCS3 through six predefined command  
codes listed in the following table. The four MSB of the command code are used to identify which X-Bus device  
should be accessed. The four LSB of the command code may be used as address or control bits and are mapped  
directly to XA[3:0] (i.e., bit[0]=XA[0], bit[1]=XA[1], etc.)  
LPC and SMBus2 arbitration registers control which interface is granted access to the X-Bus interface. Before the  
SMBus initiates an I/O cycle on the X-Bus, it should request access to the X-Bus in the SMB_ARB Arbitration  
Register located at offset 02h in the SMBus2 Registers. See 6.18.3 X-Bus SMBus2/LPC Arbitration.  
Note: When accessing the SMBus2 Registers, the four LSB are used as the address of the register that is to be read  
from or written to. When accessing an LCD controller on XCS1, the four LSB are used to determine the type (i.e.,  
Data/Command) and direction (i.e., R/W) of the transaction. It is important that the type and direction embedded in  
the command code match the type and direction dictated by the SMBus protocol. Both of these SMBus transactions  
require the Write Byte and Read Byte protocols.  
SMSC LPC47S45x  
Page 136 of 259  
Rev. 06-01-06  
DATASHEET  
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