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LPC47M10X_07 参数 Datasheet PDF下载

LPC47M10X_07图片预览
型号: LPC47M10X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 100引脚增强型超级I / O控制器, LPC接口为消费类应用 [100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications]
分类和应用: 控制器PC
文件页数/大小: 188 页 / 1031 K
品牌: SMSC [ SMSC CORPORATION ]
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NOTE: This figure is for illustration purposes only and is not intended to suggest specific implementation details.  
Host Interface  
Overview  
The Host Interface includes two contiguous 8-bit run-time registers (the Status/Command Port and the Data Port),  
and an interrupt. For illustration purposes, the Host Interface block shown in Figure 2 uses standard ISA signaling.  
Address decoding and interrupt selection for the Host Interface are determined by device configuration registers (see  
Section “MPU-401Configuration Registers”).  
I/O Addresses  
The Sound Blaster 16 MPU-401 UART mode MIDI interface requires two consecutive I/O addresses with possible  
base I/O addresses of 300h and 330h. The default is 330h. The LPC47M10x MPU-401 I/O base address is  
programmable on even-byte boundaries throughout the entire I/O address range (see Section “Activate and I/O Base  
address”).  
Registers (Ports)  
The run-time registers in the MPU-401 Host Interface are shown below in Table 33.  
TABLE 33 - MPU-401 HOST INTERFACE REGISTERS  
REGISTER  
NAME  
ADDRESS  
TYPE  
DESCRIPTION  
MIDI DATA  
MPU-401 I/O Base Address  
R/W  
Used for MIDI transmit data,  
MIDI receive data, and MPU-401  
command acknowledge.  
STATUS  
MPU-401 I/O Base Address + 1  
MPU-401 I/O Base Address + 1  
R
Used to indicate the send/receive  
status of the MIDI Data port.  
Used for MPU-401 Commands.  
COMMAND  
W
MIDI Data Port  
The MIDI Data port exchanges MIDI transmit and MIDI receive data between the MPU-401 UART interface and the  
host. The MIDI Data port is read/write (Table 34). The MIDI Data port is also used to return the command  
acknowledge byte ‘FEh’ following host writes to the COMMAND port.  
The MIDI Data port is full-duplex; i.e., the transmit and receive buffers can be used simultaneously.  
An interrupt is generated when either MIDI receive data or a command acknowledge is available to the host in the  
MIDI Data register. See Section “Bit 7 – MIDI Receive Buffer Empty” and “Interrupt”  
TABLE 34 - MIDI DATA PORT  
MPU-401 I/O BASE ADDRESS  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
DEFAULT  
TYPE  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
n/a  
NAME  
MIDI DATA/COMMAND-ACKNOWLEDGE REGISTER  
Status Port  
The Status port is used to indicate the state of the transmit and receive buffers in the MIDI Data port. The Status port  
is read-only (Table 35). Status port Bit 6 is MIDI Transmit Busy, Bit 7 is MIDI Receive Buffer Empty. The remaining  
bits in the Status port are RESERVED.  
TABLE 35 - MPU-401 STATUS PORT  
MPU-401 I/O BASE ADDRESS+1  
D7  
R
D6  
R
D5  
R
0
D4  
R
0
D3  
R
0
D2  
R
0
D1  
R
0
D0  
R
0
DEFAULT  
0x80  
TYPE  
BIT  
MIDI RX MIDI TX  
NAME  
BUFFE  
R
BUSY  
EMPTY  
Page 68  
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