BIT 2 AAS
·
·
·
In receiver mode, when register S0 is read,
PIN is set to logic “1” (inactive).
In slave receiver mode, an ACCESS.bus
STOP condition will set PIN=0 (active).
PIN=0 if a bus error (BER) occurs.
Addressed As Slave bit. Valid only when PIN=0.
When acting as slave receiver, this flag is set
when an incoming address over the
ACCESS.bus matches the value in own address
register S0’ (shifted by one bit) or if the
ACCESS.bus ‘general call’ address (00h) has
been received (‘general call’ is indicated when
AD0 status bit is also set to logic “1”).
BIT 6
Logic 0.
BIT 5 STS
BIT 1 LAB
When in slave receiver mode, this flag is
asserted when an externally generated STOP
condition is detected (used only in slave receiver
mode).
Lost Arbitration Bit. This bit is set when, in
multi-master operation, arbitration is lost to
another master on the ACCESS.bus.
BIT 0 nBB
BIT 4 BER
Bus Busy bit. This is a read-only flag indicating
when the ACCESS.bus is in use. A zero
indicates that the bus is busy, and access is not
possible. This bit is set/reset (logic “1”/logic “0”)
by START/STOP conditions.
Bus error;
a misplaced START or STOP
condition has been detected. Resets nBB (to
logic “1”; inactive), sets PIN=0 (active).
BIT 3 LRB/AD0
Last Received Bit or Address 0 (general call) bit.
This status bit serves a dual function, and is
valid only while PIN=0:
Own Address Register S0’
When the chip is addressed as slave, this
register must be loaded with the
1. LRB holds the value of the last received
bit over the ACCESS.bus while AAS=0
(not addressed as slave). Normally
this will be the value of the slave
acknowledgment; thus checking for
slave acknowledgment is done via
testing of the LRB.
2. ADO; when AAS=1 (Addressed as
slave condition) the ACCESS.bus
controller has been addressed as a
slave. Under this condition, this bit
becomes the AD0 bit and will be set to
logic “1” if the slave address received
was the ‘general call’ (00h) address, or
logic “0” if it was the ACCESS.bus
controller’s own slave address.
7
bit
ACCESS.bus address to which the chip is to
respond. During initialization, the own address
register S0’ must be written to, regardless
whether it is later used. The Addressed As
Slave (AAS) bit in status register S1 is set when
this address is received (the value in S0 is
compared with the value in S0’). Note that the
S0 and S0’ registers are offset by one bit;
hence, programming the own address register
S0’ with a value of 55h will result in the value
AAh being recognized as the chip’s
ACCESS.bus slave address.
After reset, S0’ has default address 00h.
166
SMSC [ SMSC CORPORATION ]
