Table 59 - Resets
HARDWARE RESET (RESET)
DESCRIPTION
KCLK
KDAT
MCLK
MDAT
Weak High
Weak High
Weak High
Weak High
Host I/F Data Reg
Host I/F Status Reg
RTCCNTRL
N/A
00H
80H
RTCADDR
NC
NC
RTCDATA
NC: No Change N/A: Not Applicable
has been enabled via bit 2 of the KRST_GA20
GATEA20 AND KEYBOARD RESET
Register (Logical Device 7, 0xF0) set to 1.
The FDC37C93xFR provides several options for
GateA20 and Keyboard Reset: 8042 Software
Generated GateA20 and KRESET, Fast
GateA20 and KRESET (via Hardware Speed-up)
and Port 92 Fast GateA20 and KRESET.
This register is used to support the alternate
reset (nALT_RST) and alternate A20 (ALT_A20)
functions.
Name
Port 92
92h
24h
Read/Write
8 bits
Location
Default Value
Attribute
Size
Port 92 Fast GateA20 And Keyboard Reset
Port 92 Register
This port can only be read or written if Port 92
Table 60 - Port 92 Register
FUNCTION
Reserved. Returns 00 when read.
BIT
7:6
5
4
3
2
1
Reserved. Returns a 1 when read.
Reserved. Returns a 0 when read.
Reserved. Returns a 0 when read.
Reserved. Returns a 1 when read.
ALT_A20 Signal control. Writing a 0 to this bit causes the ALT_A20 signal to
be driven low. Writing a 1 to this bit causes the ALT_A20 signal to be driven
high.
139
SMSC [ SMSC CORPORATION ]
