0ns
250ns
500ns
CLK
AEN
nAEN
64=I/O Addr
n64
nIOW
nA
DD1
nDD1
nCNTL
nIOW'
nIOW+n64
AfterD1
nAfterD1
60=I/O Addr
n60
nIOW+n60=B
nAfterD1+B
D[1]
GA20
FIGURE 8 - GATE A20 TURN-ON SEQUENCE TIMING
When writing to the command and data port
setup time is only required to be met when using
hardware speedup; the data must be valid a
minimum of 0 nsec from the leading edge of
the write and held throughout the entire write
cycle.
with hardware speedup, the IOW timing shown
in the figure titled “IOW Timing for Port 92” in
the Timing Diagrams Section is used. This
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