Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
inputs Int3_n and Int5_n. The 8051 has the following run time sources: int0, int1, int2, int3 and int4.
The Interrupt sources of Int5_n create 8051 Wakeup Events which are used to monitor and altar the
power management state. The 8051 core has three interrupt priority levels: PFI, high and low. The PFI
interrupt, if enabled, has priority over all other interrupts. See Section 12.3, "Wake-Up Events" for a
description of Wake-up Events.
7.9.1
8051 Internal Parallel Interrupts
INT2
INT3
INT4
0
1
2
3
INT2
INT3_n
INT4
GRP1
INT5_n
GRP2
External Interrupt
Enable SFR
POWER-FAIL EVENT
0
PGI
0
1
2
3
4
5
6
7
RESERVED
RESERVED
RESERVED
ACCBUS2 MSK
PS2_A
PS2_B
PS2_C MSK
PS2_D MSK
0
1
2
3
4
5
6
7
RESERVED
RESERVED
RESERVED
ACCBUS2 STAT
PS2_A
PS2_B
PS2_C STAT
PS2_D STAT
PWRGD_INT (0x7F84)
PFI
EICON SFR
INT0 MASK (0x7F01)
INT0 SRC (0x7F00)
0
1
2
3
4
5
6
7
INT0_EN
TF0_EN
INT1_EN
TF1_EN
RI + TI_EN
TF2_EN
RESERVED
RESERVED
0
1
2
3
4
5
6
7
INT0 POL
TF0 POL
INT1 POL
TF1 POL
RI + TI POL
TF2 POL
0
1
2
3
4
5
6
7
RTC_ALRM STA
RESERVED
0
1
2
3
4
5
6
7
RTC_ALRM MK
RESERVED
RESERVED
RESERVED
AB_DAT2 STAT
AB_DAT1 STAT
PM1_STS_2 STA
PM1_EN 2 STA
PM1_CTL 2 STA
AB_DAT2 MK
AB_DAT1 MK
PM1_STS_2 MK
PM1_EN 2 MK
PM1_CTL 2 MK
RESERVED
RESERVED
GRP1
Interrupt Polarity SFR
Interrupt Enable SFR
Wake Up MSK 1 (0x7F2C)
Wake Up Src 1 (0x7F2A)
0
1
2
3
4
5
6
7
RESERVED
WK_ANYKEY ST
HTIMER STAT
RESERVED
RESERVED
RESERVED
0
1
2
3
4
5
6
7
RESERVED
WKANYKEY MK
HTIMER_MK
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
0
1
2
3
4
5
6
7
ANY WUP STAT
SYS-MBOX STA
ACCBUS1 STA
GPIO3 STAT
EC_OBF STAT
EC_IBF STAT
KBD SCAN STAT
IBF STAT
0
1
2
3
4
5
6
7
ANY WUP_MK
SYS-MBOX_MK
ACCBUS1_MK
GPIO3_MK
EC_OBF_MK
EC_IBF_MK
KBD SCAN_MK
IBF_MK
Wake Up Src 2 (0x7F2B)
Wake Up MSK 2 (0x7F2D)
0
TACH1 STAT
TACH2 STAT
RESERVED
RESERVED
RESERVED
SPIDONE STAT
RESERVED
RESERVED
0
1
2
3
4
5
6
7
TACH1 MSK
TACH2 MSK
RESERVED
RESERVED
RESERVED
SPIDONE MSK
RESERVED
RESERVED
1
2
3
4
5
6
7
INT1 SRC (0x7F02)
INT1 MASK (0x7F03)
Wake Up Src 7 (0x7F64)
Wake Up MSK 7 (0x7F65)
0
LGPIO50 STAT
LGPIO51 STAT
LGPIO52 STAT
LGPIO53 STAT
RESERVED
RESERVED
RESERVED
RESERVED
0
1
2
3
4
5
6
7
LGPIO50 MSK
LGPIO51 MSK
LGPIO52 MSK
LGPIO53 MSK
RESERVED
RESERVED
RESERVED
RESERVED
1
2
3
4
5
6
7
Wake Up Src 8 (0x7F55)
Wake Up MSK 8 (0x7F56)
Figure 7.4 8051 Interrupts
SMSC LPC47N350
Revision 1.1 (01-14-03)
DATA6S5HEET
SMSC [ SMSC CORPORATION ]
