Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
23.7.2 Register B
B7
B6
B5
B4
B3
B2
B1
B0
SET
PIE
AIE
UIE
RES
DM
24/12
DSE
SET
When the SET bit is a "0", the update functions normally by advancing the counts once-per-second.
When the SET bit is a "1", an update cycle in progress is aborted and the program may initialize the
time and calendar bytes without an update occurring in the middle of initialization. SET is a read/write
bit, which is not modified by VCC1 POR or any internal functions.
PIE
The periodic interrupt enable bit is a read/write bit which allows the periodic-interrupt flag (PF) bit in
Register C to cause the IRQB port to be driven low. The program writes a "1" to the PIE bit in order
to receive periodic interrupts at the rate specified by the RS3 - RS0 bits in Register A. A “0” in PIE
blocks IRQB from being initiated by a periodic interrupt, but the periodic flag (PF) is still set at the
periodic rate. PIE is not modified by any internal function, but is cleared to "0" by a VCC1 POR.
AIE
The alarm interrupt enable bit is a read/write bit, which when set to a "1" permits the alarm flag (AF)
bit in Register C to assert IRQB. An alarm interrupt occurs for each second that the three time bytes
equal the three alarm bytes (including a "don't care" alarm code of binary 11XXXXXX). When the AIE
bit is a "0", the AF bit does not initiate an IRQB signal. The VCC1 POR port clears AIE to "0". The AIE
bit is not affected by any internal functions.
UIE
The update-ended interrupt enable bit is a read/write bit which enables the update-end flag (UF) bit in
Register C to assert IRQB. The VCC1 POR port or the SET bit going high clears the UIE bit.
RES
Reserved - read as zero
DM
The data mode bit indicates whether time and calendar updates are to use binary or BCD
Formats: The DM bit is written by the processor program and may be read by the program, but is not
modified by any internal functions or by VCC1 POR. A "1” in DM signifies binary data, while a "0" in DM
specifies BCD data.
24/12
The 24/12 control bit establishes the format of the hours byte as either the 24 hour mode if set to a "1",
or the 12 hour mode if cleared to a "0". This is a read/write bit that is not affected by VCC1 POR or
any internal function.
DSE
The daylight savings enable bit is read only and is always set to a "0" to indicate that the daylight
savings time option is not available.
23.7.3 Register C
REGISTER C IS A READ-ONLY REGISTER
SMSC LPC47N350
263
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
