Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table 23.3 RTC and CMOS RAM Address Map
BASE OFFEST REGISTER TYPE REGISTER FUNCTION
BANK
Bank0
0
1
R/W
Register 0: Seconds
Register 1: Seconds Alarm
Register 2: Minutes
Register 3: Minutes Alarm
Register 4: Hours
2
3
4
5
Register 5: Hours Alarm
Register 6: Day of Week
Register 7: Day of Month
Register 8: Month
Bank0
Bank0
6
R/W
7
8
9
Register 9: Year
A
B
C
D
32
Register A
Register B: (Bit 0 is Read Only)
Register C
R
R/W
Register D: Day of Month Alarm
Century Byte
E-31,
33-7F
General purpose
7F
0-7E
7F
Shared RTC Control
Bank 1: General purpose
Shared RTC Control
Bank1
All 256 bytes are directly writable and readable by the host with the following exceptions:
■
Registers C is read only.
■
■
■
■
■
Bit 7 of Register D is read only which can only be set by a read of Register D.
Bit 6 of Register D is read only.
Bit 7 of Register A is read only.
Bits 0 of Register B is read only.
Bits 7-1 of the Shared RTC Control register are read only.
23.5
Time Calendar and Alarm
The processor program obtains time and calendar information by reading the appropriate locations. The
program may initialize the time, calendar and alarm by writing to these locations. The contents of the
twelve time, calendar and alarm registers can be in binary or BCD as shown in Table 23.4, "RTC
Register Valid Range".
Before initializing the internal registers, the SET bit in Register B should be set to a "1" to prevent
time/calendar updates from occurring. The program initializes the twelve locations in the binary or BCD
format as defined by the DM bit in Register B. The SET bit may then be cleared to allow updates.
SMSC LPC47N350
259
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
