Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
16.3.2.1 SPDOUT - Serial Peripheral Data Out
This is the serial data output from the LPC47N350 SPI interface. When the interface is configured for
Bi-directional mode, SPDOUT is used for SPI serial I/O. This pin can be configured as SGPIO31 (See
Section 16.4, "SGPIO vs. SPI Function Control," on page 177). The data OUT is shifted out on the edge
as selected using the TCLKPH bit in the SPI Clock Control Register (SPICC).
USER’S NOTE: In the Bi-directional mode, some slave devices may tristate the last few bits to signal a turn-around;
therefore, an external weak pull-up may be required on the pin.
16.3.2.2 SPDIN - Serial Peripheral Data In
This is the serial data input to the LPC47N350 SPI. When the interface is configured for Bidirectional
mode, SPDIN is unused. This pin can be configured as SGPIO32 (Section 16.4, "SGPIO vs. SPI
Function Control," on page 177). The data IN is sampled on the edge as selected using the RCLKPH
bit in the SPI Clock Control Register (SPICC).
USER’S NOTE: Some slave device may tristate the SPDIN pin during command phase; therefore, an external weak
pull-up or pull-down may be required on the pin.
16.3.2.3 SPCLK - Serial Peripheral Clock
This is the serial clock driven by the LPC47N350 SPI (master) and connected to all SPI slaves. All data
(input and output) is sampled/shifted on SPCLK according to the clock controls CLKPH and CLKPOL
(See Section 16.7.4.1, "D0 - TCLKPH - Transmit Clock Phase," on page 183 and Section 16.7.4.2, "D1
- CLKPOL - SPI Clock Polarity," on page 183). This pin can be configured as LGPIO60 (See Section
16.4, "SGPIO vs. SPI Function Control," on page 177).
16.4
SGPIO vs. SPI Function Control
Bit[1] (MISC10) in register Multiplexing_2 Register (8051 Address 0x7F40) can be used to control
SGPIO vs. SPI function selection. This bit applies to all SPI functions. The SPDIN on SGPIO32 PIN
also requires SPIMODE bit (see Section 16.7.1.2, "D1 - SPIMODE - SPI Mode," on page 180) for its
function selection. The BIOEN bit (see Section 16.7.1.3, "D2 - BIOEN - Bidirectional Mode Output
Enable," on page 180) is also needed to select between the SPDOUT and SPDIN functions on the
SGPIO31 PIN in the bi-directional mode. The default of MISC10 bit is '0' - GPIO function. See
Table 16.2 for MISC10 Bit functionality. See Table 21.10 on page 244 for the Multiplexing_2 Register.
Table 16.2 MISC10 BIT
MISC10
SPIMODE
BIOEN
SGPIO60 PIN
SGPIO61 PIN
SGPIO62 PIN
0 (DEFAULT)
X
X
SGPIO30
SPCLK
SGPIO31
SPDOUT
SGPIO32
SPDIN
1
0 (DEFAULT)
1
1
LGPIO62
0 (DEFAULT)
SPDIN
The 8051 SGPIO registers control the direction and state of the LGPIO30-32 functions. The registers
related to SGPIO (input/output and direction) do not apply when the SPI functions are selected. If
MISC10 bit '0', writes to SPIDR are ignored and therefore transactions cannot be initiated. The internal
clocks and all Baud Rate Generator circuitry is stopped to conserve power. Changing MISC10 bit causes
all SPI register to reset to their default values. The MISC10 should not be switched to temporary
powerdown the SPI Block, the CLKEN bit in SPICC register should be used instead.
Figure 16.2 shows the SPI vs. GPIO function control logic LGPIO60-LGPIO62 in the LPC47N350.
SMSC LPC47N350
177
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
