Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
I2CA_SEL_A
S
W
I
I2C
CNTLR
A
AB1A DATA
CLK
T
C
H
DATA
ACCESS.Bus 1
AB1B_DATA
S
W
I
I2C
CNTLR
B
AB2A DATA
CLK
T
C
H
AB2B_CLK
DATA
ACCESS.Bus 2
AB2B_DATA
I2CB_SEL_A
2
Figure 15.1 I C/SMBus Controllers
2
Table 15.1 I C/SMBus Register Address Summary
ADDRESS (Note 15.1)
REGISTER ACCESS
REGISTER NAME
2
7F31h
7F31h
7F32h
7F33h
7F34h
7F67h
7F67h
7F68h
7F69h
7F6Ah
7F89h
W
R
I C/SMBus 1 Control
2
I C/SMBus 1 Status
2
R/W
I C/SMBus 1 Own Address
2
I C/SMBus 1 Data
2
R/W (Note 15.2)
I C/SMBus 1 Clock
2
W
R
I C/SMBus 2 Control
2
I C/SMBus 2 Status
2
R/W
I C/SMBus 2 Own Address
2
I C/SMBus 2 Data
2
R/W (Note 15.2)
R/W (Note 15.3)
I C/SMBus 2 Clock
2
I C/SMBus Switch
Note 15.1 These Registers are only directly accessible by the 8051 and reside within the 8051’s
external Memory Mapped Data address space.
Note 15.2 Bits 2 through 6 are read only reserved.
Note 15.3 Bits 2 through 7 are read only reserved.
Revision 1.1 (01-14-03)
166
SMSC LPC47N350
DATASHEET