Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
mem_addr[15:8]
EFA[15:8]
EFAD[7:0]
mem_addr[7:0]
mem_data_in
8051
mem_psrd_n
nEFRD
mem_pswr_n
mem_ale
nEFWR
EFALE
Figure 9.6 LPC47N350 External Flash Interface
Note: This figure is for illustration purposes only and is not intended to suggest specific implementation
details.
Table 9.5 External Flash Interface KBD Scan Pin Mapping
EXTERNAL FLASH
KBD SCAN PINS
INTERFACE
DESCRIPTION
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSI0
EFA15
EFA14
EFA13
EFA12
EFA11
EFA10
EFA9
High-Order Address Bus A15 – A8.
EFA8
EFAD7
EFAD6
EFAD5
EFAD4
EFAD3
EFAD2
EFAD1
EFAD0
EFALE
Multiplexed Low-Order Address Bus A7 - A0 and Data Bus
D0 – D7. The Low-Order Address Bus is Latched Externally
with EFALE.
KSI1
KSI2
KSI3
KSI4
Low-Order Address Bus Latch Control
SMSC LPC47N350
115
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
