Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
9.6.2
ATE Flash Program Timing
t1
t2
FPALE
t9
t5
t6
nFPRD
nFPWR
t3
t8
t10
t7
t4
FPAD[7:0]
FPA[15:8]
DAT
FPA[7:0]
FPA[7:0]
FPA[15:8]
FPA[15:8]
Figure 9.4 ATE Flash Program Access Interface Timing
Table 9.3 ATE Flash Program Access Interface Write Timing Parameters
PARAMETER
FPALE Pulse Width
MIN
TYP
MAX
UNITS
t1
t2
t4
t5
t6
t7
t8
-
-
-
-
-
-
-
50
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
Address Valid to FPALE Low
FPALE Low to Valid data In
FPALE Low to nFPWR Low
nFPWR Pulse Width
10
5
50
5
nFPWR Low to Valid Data In
Valid data Hold Time Following nFPWR Low-To-
High Transition
10
t9
nFPWR High to FPALE High
-
0
-
ns
Table 9.4 ATE Flash Program Access Interface Read Timing Parameters
PARAMETER
FPALE Pulse Width
MIN
TYP
MAX
UNITS
t1
t2
t3
t4
t5
t6
t7
t8
-
-
-
-
-
-
-
-
50
-
-
-
-
-
-
-
-
ns
Address Valid to FPALE Low
nFPRD Low to Address Float
FPALE Low to Valid data Out
FPALE Low to nFPRD Low
nFPRD Pulse Width
10
5
50
5
nFPRD Low to Valid Data Out
Valid data Hold Time Following nFPRD Low-To-
High Transition
10
t9
nFPRD High to FPALE High
-
-
-
-
0
t10
Data Float Following nFPRD Low-To-High
Transition
ns
SMSC LPC47N350
113
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
