Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table 9.2 ATE Flash Program Access Interface KBD Scan Pin Mapping
ATE FLASH
KBD SCAN
PROG ACCESS
INTERFACE
ITEM #
INTERFACE PINS
DESCRIPTION
1
2
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSI0
FPA15
FPA14
FPA13
FPA12
FPA11
FPA10
FPA9
High-Order Address Bus A15 – A8
3
4
5
6
7
High-Order Address Bus A15 – A8
8
FPA8
9
FPAD7
FPAD6
FPAD5
FPAD4
FPAD3
FPAD2
FPAD1
FPAD0
FPALE
nFPRD
Multiplexed Low-Order Address Bus A7 – A0 and
Data Bus D0 – D7. The Low-Order Address Bus
is Latched with FPALE.
10
11
12
13
14
15
16
17
18
KSI1
KSI2
KSI3
KSI4
Low-Order Address Bus Latch Control
KSI5
Active-Low ATE Flash Program Access Interface
READ Signal.
19
KSI6
nFPWR
Active-Low ATE Flash Program Access Interface
WRITE Signal.
Note: All ATE Flash Program Access Interface signals in Table 9.2 refer to Figure 9.3.
All KDB SCAN Interface pins refer to the pin configuration (See Table 2.1and Table 2.2 on page 4.)
Revision 1.1 (01-14-03)
112
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
