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47N350 参数 Datasheet PDF下载

47N350图片预览
型号: 47N350
PDF下载: 下载PDF文件 查看货源
内容描述: LEGACY免费的键盘嵌入式控制器, SPI和LPC接口对接 [LEGACY FREE KEYBOARD EMBEDDED CONTROLLER WITH SPI AND LPC DOCKING INTERFACE]
分类和应用: 控制器PC
文件页数/大小: 346 页 / 4406 K
品牌: SMSC [ SMSC CORPORATION ]
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Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface  
HIGH  
ADDRESS  
(MBX9Fh)  
(0x7FB0)  
A[15:8]  
A[7:0]  
LOW  
ADDRESS  
(MBX80h)  
(0x7FB1)  
64K  
EMBEDDED  
FLASH  
DOUT[7:0]  
TRISTATE  
DRIVER  
DIN[7:0]  
nRD  
DATA  
(MBX81h)  
(0x7FB2)  
nWE  
Figure 9.2 8051/LPC Flash Program Access  
Note: This figure is for illustration purposes only and is not intended to suggest specific implementation  
details.  
9.5  
LPC Bus Flash Program Access  
The LPC Flash Program Access function enables the 64k Embedded Flash to be programmed from an  
internal parallel hardware interface (see Figure 9.2 above). The LPC Flash Program Access function  
uses the registers in the Mailbox Registers Interface (see Section 9.10.7, "8051/LPC Flash Program  
Access Registers"). The LPC PGM bit D1 in the Flash Program register is used to enable the LPC  
Program Access function (see Section 9.10.5, "LPC PGM – D1" below). The LPC Flash Program Access  
function can only be enabled when the ATE PGM and the 8051 PGM bits are deasserted ‘0’ (Table 9.1),  
and the SYSTEM FLASH bit in the Disable register is deasserted ‘0’(See Section 7.8.3.1, "Disable  
Register").  
APPLICATION NOTE: The 8051 must be stopped to use the LPC Bus Flash Program Access function. When Flash  
programming operations are completed, the LPC Host must return the Embedded Flash to  
the READ ARRAY state (Table 8.6) before returning to the 8051 Code Fetch Access mode  
(Table 9.1) and restarting the 8051 clock.  
To program the 64k Embedded Flash using the LPC Bus Flash Program Access function, first use the  
Flash High Address (MBX9Fh) and Flash Low Address (MBX80h) registers for program and page  
address arguments and then the Flash Data register (MBX81h) for program data, read data, command  
codes and status data.  
Note: Address arguments for Program Byte and Page Erase operations must be initialized in the LPC  
Flash Program Access address registers before read and write commands to the CSI Host  
Interface are activated by reads and writes to the LPC Flash Program Access DATA register  
(MBX81h).  
Revision 1.1 (01-14-03)  
110  
SMSC LPC47N350  
DATASHEET