SiI 1160 PanelLink Transmitter
Data Sheet
Feature Information
I2C Interface
The SiI 1160 Tx provides an I2C slave interface for more precise control of the chip features. Use of this interface
is optional and is selected by the ISEL/RST pin. If not used, the chip register settings return to a default state; the
EDGE and PD features then come under the control of the respective strap pins instead.
The I2C slave state machine operates from an internal clock derived from the incoming SCL signal. No video
clock and input is required to read and write to the I2C registers from address 0x00 to 0x0F. These accesses can
also take place using only the SCL clock in power down mode.
The transmitter responds to the seven-bit binary I2C address of 0x70. A read or write transaction is determined by
bit 0 of the I2C address. Setting this bit to 0 will enable a write transaction and setting this bit to 1 will enable a
read transaction.
The I2C read operation is shown in Figure 9, and the write operation in Figure 10. Page mode is not supported.
Bus Activity :
Master
Slave Address
Register Address
Slave Address
SDA
S
S
P
No
A
C
K
A
C
K
A
C
K
A
C
K
Data
Figure 9. I2C Byte Read
Bus Activity :
Master
Slave Address
Register Address
Data
SDA
S
P
A
C
K
A
C
K
A
C
K
Figure 10. I2C Byte Write
11
SiI-DS-0126-B
SILICONIMAGE [ Silicon image ]
