C8051F52x-53x
SFR Definition 14.5. P0MDOUT: Port0 Output Mode
R/W
Bit7
R/W
Bit6
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Reset Value
00000000
Bit0
SFR Address:
0xA4
Bits7–0: Output Configuration Bits for P0.7–P0.0 (respectively): ignored if corresponding bit in regis-
ter P0MDIN is logic 0.
0: Corresponding P0.n Output is open-drain.
1: Corresponding P0.n Output is push-pull.
(Note: When SDA and SCL appear on any of the Port I/O, each are open-drain regardless
of the value of P0MDOUT).
SFR Definition 14.6. P0SKIP: Port0 Skip
R/W
Bit7
R/W
Bit6
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Reset Value
00000000
Bit0
SFR Address:
0xD4
Bits7–0: P0SKIP[7:0]: Port0 Crossbar Skip Enable Bits.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (V
input, external oscil-
REF
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
Rev. 0.3
127
SILICON [ SILICON ]
