C8051F52x-53x
SFR Definition 14.13. P0SKIP: Port0 Skip
R/W
Bit7
R/W
Bit6
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Reset Value
00000000
Bit0
SFR Address:
0xD4
Bits7–0: P1SKIP[7:0]: Port1 Crossbar Skip Enable Bits.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (V
input, external oscil-
REF
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P1.n pin is not skipped by the Crossbar.
1: Corresponding P1.n pin is skipped by the Crossbar.
SFR Definition 14.14. P1MAT: Port1 Match
R/W
Bit7
R/W
Bit6
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Reset Value
11111111
Bit0
SFR Address:
0xCF
Bits7–0: P1MAT[7:0]: Port1 Match Value.
These bits control the value that unmasked P0 Port pins are compared against. A Port
Match event is generated if (P1 & P1MASK) does not equal (P1MAT & P1MASK).
SFR Definition 14.15. P1MASK: Port1 Mask
R/W
Bit7
R/W
Bit6
R/W
Bit5
R/W
Bit4
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Reset Value
00000000
Bit0
SFR Address:
0xBF
Bits7–0: P1MASK[7:0]: Port1 Mask Value.
These bits select which Port pins will be compared to the value stored in P1MAT.
0: Corresponding P1.n pin is ignored and cannot cause a Port Match event.
1: Corresponding P1.n pin is compared to the corresponding bit in P1MAT.
Rev. 0.3
131
SILICON [ SILICON ]
