LC89057W-VF4A-E
CCB address: 0xE8; Command address: 1; Demodulation function: System setting
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
0
0
0
1
0
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
PBSEL1
PBSEL0
FSLIM1
FSLIM0
RXMON
AOSEL
VOSEL
UOSEL
UOSEL
EMPHA/UO/CO pin setting (When PBSEL1 is set to 0.)
0: EMPHA emphasis output (initial value)
1: UO user data output
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VOSEL
AUDIO/VO pin setting
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0: AUDIO channel status bit 1 output (initial value)
1: VO validity flag output
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AOSEL
Output contents at the time of setting AUDIO is set with AUDIO/VO pin
0: only output channel status bit 1 (initial value)
1: output channel status bit 1, IEC61937 or DTS-CD/LD detection flag
RXMON
FSLIM [1:0]
Setting of digital data input status monitoring
0: Don't monitor data input status (initial value)
1: Monitor data input status
Setting of sampling frequency reception range for input digital data signal
00: No limit (initial value)
01: fs ≤ 96kHz
10: fs ≤ 48kHz
11: Reserved
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PBSEL [1:0]
CKST/PB pin setting
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00: signal output of switching transition term of CKST clock (initial value)
01: Preamble B synchronization signal output with PB, DIT function
10: Preamble B synchronization signal output with PB, DIR function
11: Reserved
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In case of setting with PBSEL at 1, terminal of EMPHA/UO/CO will be Channel status data output terminal CO and
the setting for UOSEL is impossible. In case of setting with PBSEL at 0, the setting for EMPHA/UO/CO terminal
follows the setting for UOSEL.
The setting of AOSEL comes into effect in the case that the bit 1 output of channel status is selected with VOSEL. In
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the case that 1 is selected with AOSEL, AUDIO/VO terminal output high level, when either channel status bit 1 or
IEC61937, non-PCM synchronous signal is detected.
No.7202-39/59
SANYO [ SANYO SEMICON DEVICE ]
