LC89057W-VF4A-E
CCB address: 0xE8; Command address: 3; Demodulation function: R system output clock setting
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
0
0
1
1
0
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
XRLRCK1
XRLRCK0
XRBCK1
XRBCK0
XRSEL1
XRSEL0
PRSEL1
PRSEL0
PRSEL [1:0]
Setting of RMCK output frequency while PLL is locked
00: 1/2 of PLLSEL setting frequency (initial value)
01: 1/1 of PLLSEL setting frequency
10: 1/4 of PLLSEL setting frequency
11: Muted
XRSEL [1:0]
XRBCK [1:0]
XRLRCK [1:0]
Setting of RMCK output frequency during XIN source
00: 1/1 of XINSEL setting frequency (initial value)
01: 1/2 of XINSEL setting frequency
10: 1/4 of XINSEL setting frequency
11: Muted
Setting of RBCK output frequency during XIN source
00: 3.072MHz output (initial value)
01: 6.144MHz output
10: 12.288MHz output
11: Muted
Setting of RLRCK output frequency during XIN source
00: 48kHz output (initial value)
01: 96kHz output
10: 192kHz output
11: Muted
•
If the RMCK frequency is set lower than RBCK when the XIN source is used, 3.072MHz is output from RBCK. This
also applies to SBCK.
No.7202-41/59