S3C4510B
ETHERNET CONTROLLER
Table 7-14. BDMA Status Register Description
Bit Name Description
Bit Number
[0]
BDMA Rx done every
received frame (BRxRDF)
This bit is set each time the BDMA receiver moves one
received data frame to memory. This bit must be cleared for
the receiving next frame interrupt generation.
[1]
BDMA Rx null list (BRxNL)
If this bit is set, the BDMARXPTR has a null address. Even if
BDMA Rx is disabled, data is transferred from the MAC Rx
FIFO to the BDMA Rx buffer until the BDMA Rx buffer
overflows.
[2]
[3]
[4]
[5]
BDMA Rx not owner (BRxNO) If this bit is set, BDMA is not the owner of the current data
frame. The BRxSTSKO bit is set and BDMA Rx is stopped.
BDMA Rx maximum size over If this bit is set, the received frame size is larger than the value
(BRxMSO)
in the Rx frame maximum size register, BDMARXLSZ.
BDMA Rx buffer empty
(BRxEmpty)
If this bit is set, the BDMA Rx buffer is empty.
Early notification (BRxSEarly) This bit is set when the BDMA receiver has received the
length/Ether-type field of the current frame.
[6]
[7]
Reserved
Not applicable.
One more frame data in
BDMA receive buffer
(BRxFRF)
This bit is set whenever an additional data frame is received in
the BDMA receive buffer.
[15:8]
[16]
Number of frames in BDMA
receive buffer (BRxNFR)
This value indicates the total number of data frames currently
in the BDMA receive buffer.
BDMA Tx complete to send
control packet (BTxCCP)
Bit [16] is set each time the MAC sends a complete control
packet.
[17]
BDMA Tx null list (BTxNL)
If this bit is set, the BDMATXPTR value is a null address. In
this case, BDMA Tx is disabled but data continues to be
transferred from the BDMA Tx buffer to the MAC Tx FIFO until
the BDMA Tx buffer underflows. This bit is read only.
If you set BDMA Tx reset bit by software, this bit is cleared
automatically. To resume data transfer, you must then set the
new frame descriptor pointer and enable BDMA Tx.
[18]
BDMA Tx not owner (BTxNO) If [18] is set, BDMA is not owner of the current frame. In this
case, the BSTSKO bit is set and BDMA Tx is stopped.
[19]
[20]
Reserved
Not applicable.
BDMA Tx buffer empty
(BTxEmpty)
If this bit is set, the BDMA Tx buffer is empty.
[31:21]
Reserved
Not applicable.
7-31
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