ETHERNET CONTROLLER
S3C4510B
BDMARxCON Register
31
18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
0
B B
R R
B
R
x
L
i
B
R
x
B B
B R R
R x
B B
R R
B B
R R
B
R
x
W
A
x
x
x
x
x
E E
M
S
O
I
x
M S
D A T
N N
O L
Reserved
x
x
BRxBRST
a
r
l
m
p
t
t
R E
S n
I
I
S
t
I
I
E N K
C O
l
E E
E
e
y
y
[4:0] BDMA Rx burst size (BRxBRST)
Burst data size = ( BRxBRST + 1 ) word.
[5] BDMA Rx stop/skip frame (or interrupt if not owner of the current frame (BRxSTSKO)
0 = Skips the current frame and goes to the next frame descriptor.
1 = BDMA receiver generates an interrupt (if enabled).
[6] BDMA Rx memory address increment/decrement (DRxMAINC)
0 = Decrement the frame memory address.
1 = Increment the frame memory address.
[7] BDMA Rx every receuve frane interrupt enable (BRxDIE)
0 = Disable frame receive done interrupt.
1 = Enable frame receive done interrupt.
[8] BDMA Rx Null list interrupt enable (BRxNLIE)
0 = Disable Null address (0x00000000) receive interrupt.
1 = Enable Null address (0x00000000) receive interrupt.
[9] BDMA Rx not owner interrupt enable (BRxNOIE)
0 = Disable interrupt for BDMA Rx not owner of the current frame.
1 = Enable interrupt for BDMA Rx not onwer of the current frame.
[10] BDMA Rx maximum size over interrupt enable (BRxMSOIE)
0 = Disable interrupt for received frame if larger than the maximum frame size.
1 = Enable interrupt for received frame if larger than the maximum frmae size.
[11] BDMA Rx Big/Little Endian (BRxLittle)
0 = Big-Endian frame data format.
1 = Little-Endian. (Frame data in BDMA Rx buffer is word-swapped on the system bus).
[13:12] BDMA Rx word alignment (BRxWA)
00 = Do not insert an invalid byte in the first received frame data.
01 = Insert one invalid byte in the first received frame data.
10 = Insert two invalid bytes in the firat received frame data.
11 = Insert three invalid bytes in the first received frame data.
[14] BDMA Rx enable (BRxEn)
0 = Disable the BDMA receiver.
(If the MAC Rx FIFO is not empty, move data to the BDMA Rx buffer).
1 = Enable the BDMA receiver.
[15] BDMA Rx reset (BRxRs)
0 = No effect.
1 = Reset the BDMA receiver.
[16] BDMA Rx buffer empty interrupt (RxEmpty)
0 = Disable the Rx buffer empty interrupt.
1 = Enable the Rx buffer empty interrupt.
[17] BDMA Rx early notify interrupt (BRxEarly)
0 = Disable the Rx early notify interrupt.
1 = Enable the interrupt when BDMA captures the length of the received frame type.
Figure 7-13. Buffered DMA Receiver Control Register
7-28
SAMSUNG [ SAMSUNG ]
