ETHERNET CONTROLLER
S3C4510B
BDMA Receive Frame Maximum Size Register
Table 7-11. BDMARXLSZ Register
R/W Description
R/W Receive frame maximum size
Registers
Offset
Reset Value
Undefined
BDMARXLSZ
0x9010
Table 7-12. BDMA Receive Frame Maximum Size Register Description
Bit Number
Bit Name
Description
[15:0]
BDMA receive frame
maximum size (BRxLSZ)
This register value controls how many bytes per frame can be
saved to memory. If the received frame size exceeds the
value stored in this location, an error condition is reported.
[31:16]
BDMA receive frame length
(BRxFSZ), read-only
When an early notification (early notify) interrupt occurs, the
frame Length/Ethernet type field contains the Frame size of
the frame that is currently being received.
To save space in the frame memory buffer, you can determine
the current frame length by 1) enabling the early notification
interrupt, and 2) reading the BRxFSZ field when the interrupt
occurs.
To calculate the value of the next frame start address pointer,
you add the current frame size value (BRxFSZ) to the BDMA
receive start address register. (For a control packet, additional
space may be needed.)
NOTE: To obtain the next Rx frame address that is to be
saved in the Rx frame start address register, we recommend
that you first halt the BDMA operation.
BDMA Status Register
Table 7-13. BDMASTAT Register
Registers
Offset
R/W
Description
Buffered DMA status
Reset Value
BDMASTAT
0x9014
R/W
0x00000000
7-30
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