K7I163682B
K7I161882B
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Q
K
LD
R/W
OPERATION
Q(A0)
Q(A1)
Stopped
X
H
L
X
X
H
L
Previous state
High-Z
Previous state
High-Z
Clock Stop
No Operation
Read
↑
↑
↑
QOUT at C(t+1)
Din at K(t+1)
QOUT at C(t+2)
Din at K(t+1)
L
Write
Notes: 1. X means "Don′t Care".
2. The rising edge of clock is symbolized by ( ↑ ).
3. Before enter into clock stop status, all pending read and write operations will be completed.
WRITE TRUTH TABLE(x18)
K
K
↑
↑
↑
↑
BW0
L
BW1
L
OPERATION
↑
WRITE ALL BYTEs ( K↑ )
WRITE ALL BYTEs ( K↑ )
WRITE BYTE 0 ( K↑ )
WRITE BYTE 0 ( K↑ )
WRITE BYTE 1 ( K↑ )
WRITE BYTE 1 ( K↑ )
WRITE NOTHING ( K↑ )
WRITE NOTHING ( K↑ )
L
L
↑
↑
↑
L
H
L
H
H
L
H
L
H
H
H
H
Notes: 1. X means "Don′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K ( ↑ ).
3. Assumes a WRITE cycle was initiated.
4. This table illustates operation for x18 devices.
WRITE TRUTH TABLE(x36)
K
K
↑
↑
↑
↑
↑
BW0
L
BW1
L
BW2
L
BW3
L
OPERATION
↑
WRITE ALL BYTEs ( K↑ )
WRITE ALL BYTEs ( K↑ )
WRITE BYTE 0 ( K↑ )
L
L
L
L
↑
↑
↑
↑
L
H
H
L
H
H
H
H
L
H
H
H
H
L
L
WRITE BYTE 0 ( K↑ )
H
H
H
H
H
H
WRITE BYTE 1 ( K↑ )
L
WRITE BYTE 1 ( K↑ )
H
H
H
H
WRITE BYTE 2 and BYTE 3 ( K↑ )
WRITE BYTE 2 and BYTE 3 ( K↑ )
WRITE NOTHING ( K↑ )
WRITE NOTHING ( K↑ )
L
L
H
H
H
H
Notes: 1. X means "Don′t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K ( ↑ ).
3. Assumes a WRITE cycle was initiated.
July. 2004
Rev 3.1
- 8 -
SAMSUNG [ SAMSUNG ]
