K7I163682B
K7I161882B
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
SCAN REGISTER DEFINITION
Part
Instruction Register
Bypass Register
ID Register
32 bits
32 bits
Boundary Scan
107 bits
512Kx36
1Mx18
3 bits
3 bits
1 bit
1 bit
107 bits
ID REGISTER DEFINITION
Revision Number
Part Configuration
(28:12)
00def0wx0t0q0b0s0
Samsung JEDEC Code
(11: 1)
Part
Start Bit(0)
(31:29)
000
512Kx36
1Mx18
00001001110
00001001110
1
1
000
00def0wx0t0q0b0s0
Note : Part Configuration
/def=001 for 18Mb, /wx=11 for x36, 10 for x18
/t=1 for DLL Ver., 0 for non-DLL Ver. /q=1 for QDR, 0 for DDR /b=1 for 4Bit Burst, 0 for 2Bit Burst /s=1 for Separate I/O, 0 for Common I/O
BOUNDARY SCAN EXIT ORDER
ORDER
PIN ID
ORDER
PIN ID
10D
9E
10C
11D
9C
ORDER
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
PIN ID
2C
3E
2D
2E
1E
2F
3F
1G
1F
3G
2G
1J
2J
3K
3J
2K
1K
2L
1
2
6R
6P
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
3
4
6N
7P
5
6
7N
7R
9D
7
8
8R
8P
11B
11C
9B
10B
11A
Internal
9A
8B
7C
6C
8A
7A
7B
6B
6A
5B
5A
4A
5C
4B
3A
1H
1A
2B
3B
1C
1B
9
9R
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
11P
10P
10N
9P
10M
11N
9M
9N
11L
11M
9L
10L
11K
10K
9J
3L
1M
1L
3N
3M
1N
2M
3P
2N
2P
1P
3R
4R
4P
5P
5N
5R
97
98
99
9K
10J
11J
11H
10G
9G
11F
11G
9F
100
101
102
103
104
105
106
107
10F
11E
10E
3D
3C
1D
Note: 1. NC pins are read as "X" ( i.e. don′t care.)
July. 2004
Rev 3.1
- 15 -
SAMSUNG [ SAMSUNG ]
