Preliminary
K5A3x80YT(B)C
MCP MEMORY
Flash SWITCHING WAVEFORMS
RESET Timing Diagram
High
RY/BY
CE or OE
F
tRH
RESET
tRP
tREADY
Reset Timings NOT during Internal Routine
tREADY
RY/BY
tRB
CE or OE
F
tRP
RESET
Reset Timings during Internal Routine
Power-up and RESET Timing Diagram
tRSTS
RESET
Vcc
F
Address
DATA
tAA
70ns
80ns
Unit
Parameter
Symbol
Min
Max
Min
Max
RESET Pulse Width
tRP
500
-
500
-
ns
RESET Low to Valid Data
(During Internal Routine)
tREADY
-
-
20
-
-
20
ms
RESET Low to Valid Data
(Not during Internal Routine)
tREADY
500
500
ns
RESET High Time Before Read
RY/BY Recovery Time
tRH
tRB
50
0
-
-
-
-
50
0
-
-
-
-
ns
ns
ns
ns
RESET High to Address Valid
RESET Low Set-up Time
tRSTW
tRSTS
200
500
200
500
Revision 0.0
November 2002
- 39 -