Preliminary
K5A3x80YT(B)C
MCP MEMORY
Flash SWITCHING WAVEFORMS
Chip/Block Erase Operations
tAS
555H for Chip Erase
555H
2AAH
555H
555H
2AAH
BA
Address
tAH
tRC
CE
F
tOES
OE
tWC
tWP
WE
tWPH
tDH
tCS
10H for Chip Erase
30H
AAH
55H
80H
AAH
55H
DATA
tDS
RY/BY
Vcc
F
tVCS
NOTE: BA : Block Address
70ns
80ns
Parameter
Symbol
Unit
Min
Max
Min
80
0
Max
Write Cycle Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
tWC
tAS
70
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
tAH
45
35
0
45
35
0
tDS
tDH
OE Setup Time
tOES
tCS
0
0
CE Setup Time
0
0
F
Write Pulse Width
tWP
tWPH
tRC
35
25
70
50
35
25
80
50
Write Pulse Width High
Read Cycle Time
Vcc Set Up Time
tVCS
F
Revision 0.0
November 2002
- 35 -
SAMSUNG [ SAMSUNG ]
